1. Field of the Invention
The present invention relates, in general, to a printed circuit board (PCB) and a method of fabricating the same and, more particularly, to a PCB and a method of fabricating the same, in which a contact portion is formed on an internal layer of the multi-layered PCB, a groove is formed so as to expose the contact portion of the internal layer, and a chip package is mounted on the PCB while being flip-chip bonded to the exposed contact portion of the internal layer.
2. Description of the Prior Art
A semiconductor package is exemplified by a resin seal package, a tape carrier package (TCP), a glass seal package, and a metal seal package. Furthermore, the semiconductor package is classified into a TH-type, in which a hole is formed through a PCB and a pin is inserted into the hole, and a surface mounting technology (SMT) type, in which it is mounted on a surface of a PCB, according to a mounting method thereof.
The TH-type is the typical integrated circuit (IC) package which has been used for the longest time, and representative examples include a dual inline package (DIP), in which a plurality of pins protrude from both sides of the package in a straight line, and a pin grid array (PGA), in which pins are arranged on the underside of a large hexahedron.
The SMT-type is a package having a structure in which, when a packaged chip is electrically connected to a substrate, the electric connection is achieved on the substrate unlike the TH-type, in which the pin is inserted into the hole and soldered.
Compared to the TH-type, the SMT-type is advantageous in that, assuming that chips having the same size are employed, the mounting area is reduced because of the small size, it is thin and lightweight, and operation speed improves with an increase in frequency because of a low parasitic capacitance or inductance.
Other advantages are that it is unnecessary to form a hole, a soldering region and a pitch can be reduced, it is possible to achieve highly dense wiring and mounting, and the cost of fabricating a PCB can be reduced. However, the SMT-type is disadvantageous in that it is difficult to inspect the appearance of a soldered part.
Representative examples of the SMT-type package include a quad flat package (QFP), a plastic leaded chip carrier (PLCC), a ceramic leaded chip carrier (CLCC), and a ball grid array (BGA).
Meanwhile, there are some limits with respect to the size and thickness of a PCB in the course of mounting many parts on the PCB. Recently, demand for slim mobile devices which are handy to carry is growing, and thus, it is necessary to arrange integrated and passive components in a space having a restricted area and height on a surface of the PCB.
A thin chip may be fabricated to satisfy such a necessity. In this case, however, handling problems and signal interference problems between layers may occur.
In other words, multiple layers of integrated circuit chips are integrated in one conventional integrated circuit chip package. At this time, the integrated circuit chip must be very thin in order to insert many layers of chips into a package having a restricted thickness. However, since the integrated circuit chip is very thin, it is difficult to handle the chip and signal interference problems between the integrated circuit chips occur.
Meanwhile, a technology of embedding an integrated circuit chip in a PCB has been suggested to compensate for insufficient space.
With respect to the above technology, Japanese Pat. Laid-Open Publication No. 11-274734 discloses an electronic circuit device which is provided with a circuit substrate that acts as a core, electronic parts mounted on the circuit substrate, an insulating layer formed on the circuit substrate, and a circuit formed on the insulating layer.
FIG. 1 is a sectional view of a conventional PCB having a chip mounted thereon.
Referring to FIG. 1, in the conventional PCB having the chip mounted thereon, a circuit substrate 10 is used as a core, and circuit patterns 12, 18 are formed on upper and lower sides of the circuit substrate.
A through hole 13 is formed through the circuit substrate 10 to connect external and internal circuits to each other. A chip 16 is flip-chip bonded to the circuit substrate 10 and thus mounted on it. A welding bump 17 formed on a pad of the integrated circuit chip 16 is connected to a land 18 on the circuit substrate 10.
Additionally, a plurality of insulating layers 22 is laminated on the circuit substrate 10, and a circuit pattern 25 is formed on each of the insulating layers 22.
At this stage, an integrated circuit chip 29 is mounted on an external surface of the outermost layer 22 of the insulating layers 22, and connected to a wire pattern on the surface of the outermost insulating layer 22.
However, in the conventional technology of embedding the integrated circuit chip in the PCB, it is difficult to form a passage for emitting heat, and thus, it is hard to apply the technology to an integrated circuit chip which generates a lot of heat.
Furthermore, since it is necessary to control occurrence of dust during the fabrication of the PCB to be the same level as that during the fabrication of a semiconductor, undesirably, clean room facilities must be newly installed or the level of dust must be tightly controlled.